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2004 Microchip Technology Inc.
DS30491C-page 297
PIC18F6585/8585/6680/8680
23.2.3.1
Programmable TX/RX and
Auto RTR Buffers
The ECAN module contains 6 message buffers that can
be programmed as transmit or receive buffers. Any of
these buffers can also be programmed to automatically
handle RTR messages.
REGISTER 23-22: BnCON: TX/RX BUFFER n CONTROL REGISTERS IN RECEIVE MODE
[0
≤ n ≤ 5, TXnEN (BSEL0<n>) = 0](1)
Note:
These registers are not used in Mode 0.
R/C-0
R/W-0
R-0
RXFUL
RXM1
RTRRO
FILHIT4
FILHIT3
FILHIT2
FILHIT1
FILHIT0
bit 7
bit 0
bit 7
RXFUL: Receive Full Status bit(1)
1
= Receive buffer contains a received message
0
= Receive buffer is open to receive a new message
Note:
This bit is set by the CAN module upon receiving a message and must be cleared
by software after the buffer is read. As long as RXFUL is set, no new message will
be loaded and buffer will be considered full.
bit 6
RXM1: Receive Buffer Mode bit
1
= Receive all messages including partial and invalid (acceptance filters are ignored)
0
= Receive all valid messages as per acceptance filters
bit 5
RTRRO: Read-Only Remote Transmission Request bit for Received Message
1
= Received message is a remote transmission request
0
= Received message is not a remote transmission request
bit 4-0
FILHIT4:FILHIT0: Filter Hit bits
These bits indicate which acceptance filter enabled the last message reception into this buffer.
01111
= Acceptance Filter 15 (RXF15)
01110
= Acceptance Filter 14 (RXF14)
...
00001
= Acceptance Filter 1 (RXF1)
00000
= Acceptance Filter 0 (RXF0)
Note 1: These registers are available in Mode 1 and 2 only.
Legend:
U = Unimplemented bit, read as ‘0’
- n = Value at POR
C = Clearable bit
R = Readable bit
W = Writable bit
x = Bit is unknown
‘1’ = Bit is set
‘0’ = Bit is cleared
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